Assignment
#3:
The purpose
of this laboratory exercise is to investigate registers, adders, counters, Finite
State Machines and Pre-designed Cores. We will begin with the design of a ripple-carry adder and then
use it in conjunction with registers to perform simple arithmetic computations.
We will also explore counters as the part of the exercise. Moreover, Finite
State Machines (FSMs) and pre-designed cores will be described in this
assignment. Finite State Machines (FSMs) are digital circuits that are use to
control what happens in a digital circuit
(typically by controlling enable and reset signals on registers) and when
it happens (during which clock period). The purpose of this
lab is to gain experience working with finite state machines. You will begin
with FSMs that represent sequence recognizers, similar to the ones discussed in
class, and then show how finite state machines can be used as part of a
communication mechanism between two circuits.
To simplify
some of the steps a starter kit has been provided on the course website under
Assignment #3. The starter kit is a ZIP archive containing a Quartus II projects for each part of the lab. Retrieve and
unzip the archive into a working directory called Assignment3.
I) Assignment Description:
II) Starter Kit: